Showing posts with label interrupts. Show all posts
Showing posts with label interrupts. Show all posts
Wednesday, June 24, 2009
The New PsychOS Century
PsychOS has now reached the 100-revision mark! And what a revision it is - with this commit, we now have interrupt-based terminal I/O essentially working. This still has a few unresolved bugs; for instance, we don't handle the case where the server task I/O buffer overflows. Nevertheless, this brings us a lot closer than before to completing the kernel portion of Real-Time. Keep posted!
Thursday, June 18, 2009
For Whom The Clock Ticks
Another week, another feature: we now have hardware interrupts working! Software interrupts are comparatively easier to handle, as the user task can decide when they occur; by contrast, a hardware interrupt can strike anytime, so your context switch needs to be prepared.
To soften the blow, we used the Vectored Interrupt Controllers (VIC) within the TS-7200 system-on-chip. These function as interrupt service routine jump tables with the added benefit of a built-in priority mechanism; proper initialization permitting, they will automatically turn off all interrupts at higher priority. Handy indeed.
It's futile to handle hardware interrupts unless you actually do something with them, so we've also put together the ClockServer(). This special user task receives notification of timer interrupts from ClockNotifier(), which in turn waits upon those interrupts using the new AwaitEvent() system call. When a task calls AwaitEvent(), the kernel keeps track of which event the caller is waiting on. Upon a hardware interrupt, the ARM jumps to our KernelEnter() in IRQ mode, does all of that wonderful context-switching-related stuff, then looks up the current interrupt in the VIC. The VIC provides the address of a handler function; for instance, interrupts from Timer 3 are handled by TimerHandler(). These handlers take care of waking up the appropriate tasks by reinserting them onto the priority queues.
Of course, we've omitted a few details; you can always poke around our source code to fill in the blanks.
To soften the blow, we used the Vectored Interrupt Controllers (VIC) within the TS-7200 system-on-chip. These function as interrupt service routine jump tables with the added benefit of a built-in priority mechanism; proper initialization permitting, they will automatically turn off all interrupts at higher priority. Handy indeed.
It's futile to handle hardware interrupts unless you actually do something with them, so we've also put together the ClockServer(). This special user task receives notification of timer interrupts from ClockNotifier(), which in turn waits upon those interrupts using the new AwaitEvent() system call. When a task calls AwaitEvent(), the kernel keeps track of which event the caller is waiting on. Upon a hardware interrupt, the ARM jumps to our KernelEnter() in IRQ mode, does all of that wonderful context-switching-related stuff, then looks up the current interrupt in the VIC. The VIC provides the address of a handler function; for instance, interrupts from Timer 3 are handled by TimerHandler(). These handlers take care of waking up the appropriate tasks by reinserting them onto the priority queues.
Of course, we've omitted a few details; you can always poke around our source code to fill in the blanks.
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